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Tips:
 | NOTE: Your analog circuit must share a common ground with the XS40 board
(see location of
ground pins). However, do not connect any external power
supplies (e.g., the 5V and -15V supplies) to any XS40 pins! |
| Choose I/O pin locations to facilitate easy connection of your digital
probes. For example, when selecting the pin locations for a seven-bit bus,
order the pins from left to right to match your most significant to least
significant bits. |
| Test your analog hardware using a stand-alone circuit that generates a
simple sequence of 7-bit digital values.
dactesto.v (and associated
dactesto.ucf) is a
self-oscillating circuit that uses a free-running up-counter to create a
linearly increasing output value.
You will need to adjust the output pin locations to match your own hardware. |
| If you want to generate a DAC test sequence using a variable frequency
clock source, use dactest.v (and
associated dactest.ucf). You can change the input pin if needed, but you must use one of the eight
global clock input pins.
Use the function generator to create the clock waveform; set the amplitude to
3.3V and the DC offset to 1.67V (half of 3.3V). |
| Use alive.bit (must right-click the
link and select "Save As") to get a quick visual indicator that your FPGA and
LED are working. You will see a single active segment chase around all seven
segments. |
MSO Setup:
Put the MSO in a standard configuration for debugging and demonstration as
follows:
- Save the MSO setup file adc.scp
to a 3.5" floppy disk. This is a "binary file" (not a text file), so you need
to right-click on the link and select "Save Target As..." to properly transfer
the file to disk.
- Insert the floppy in the MSO disk drive.
- Press the front panel button "File -> Save/Recall" followed by "Softkey ->
Recall".
- Press "Softkey -> From" repeatedly to select your floppy disk file (you
can also rotate the selection knob to the right of the MSO screen).
- Press "Softkey -> Press to Recall" to load the configuration file.
Connect the MSO to your circuit
as follows:
| Signal |
MSO Probe |
| Vin (analog input) |
Analog 1 |
| Vdac (DAC voltage) |
Analog 2 |
Status signal
(MSO triggers on rising edge of this signal) |
Digital 15 |
| Measurement bit 6 |
Digital 14 |
| Measurement bit 5 |
Digital 13 |
| Measurement bit 4 |
Digital 12 |
| Measurement bit 3 |
Digital 11 |
| Measurement bit 2 |
Digital 10 |
| Measurement bit 1 |
Digital 9 |
| Measurement bit 0 |
Digital 8 |
| Comparator output (as used by FPGA) |
Digital 7 |
| DAC control bit 6 |
Digital 6 |
| DAC control bit 5 |
Digital 5 |
| DAC control bit 4 |
Digital 4 |
| DAC control bit 3 |
Digital 3 |
| DAC control bit 2 |
Digital 2 |
| DAC control bit 1 |
Digital 1 |
| DAC control bit 0 |
Digital 0 |
Activities:
Refresh your memory about the Week 3 Deliverables.
Your goals at the end of Week 3 are to complete the hardware implementation
and debugging, to evaluate your finished systems according to your test plan,
and to demonstrate the finished systems to the instructor.
Collect an appropriate number of MSO screenshots to document the proper
operation of your ADC device.
Request the instructor to view your demonstration only after you have
completed your performance evaluation.
Continue to Final Report
Design Project Homepage
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