Reference Design

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"Math Lock" Reference Design

Files and diagrams to support the lectures on the "Math Lock" reference design:

bullet Controller state transition diagram
bullet Block diagram of top-level and datapath modules
bulletNavigable Verilog descriptions (HTML)
bullet Verilog descriptions and testbenches (ZIP file)
bulletFunctional verification results (waveform plots):
bullet MathLock (overall system)
bullet Controller
bullet KeypadEncoder
bullet KeySummer
bullet IntervalTimer

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 ECE333: Digital Systems (W 2002-03)
Department of Electrical and Computer Engineering
Rose-Hulman Institute of Technology


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Last updated: 03/10/05.