Lab 2

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Single-Chip Exponential Calculator

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Introduction

Last week you performed a gate-level design on a moderately complex combinational circuit. This week you will implement the same design using a programmable logic device, or PLD. You will work with a variety of PLDs of varying complexity in this course, so your first introduction to these devices will be to a simple PLD called generic array logic, or GAL. You will also be introduced a simple hardware description language called ABEL (Advanced Boolean Expression Language).

Objectives

bulletLearn how to implement an ABEL-based design in a GAL (generic array logic)
bulletDesign, implement, and test a combinational logic circuit using a single GAL chip

Parts List

bulletGAL22V10 PLD
bulletConductive foam for GAL device (always carry the chip in the conductive foam to avoid damage from electrostatic discharge, or ESD)
bullet74HC4040 12-stage binary counter

Equipment

bulletAgilent 54622D mixed-signal oscilloscope (MSO)
bulletDigital probes for MSO
bulletAgilent 33120A function/arbitrary waveform generator
bulletFixed 5-volt power supply
bulletBreadboard

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Prelab

  1. Familiarize yourself with the basic architecture of the GAL PLD by studying the datasheet for the Lattice Semiconductor GAL22V10.
     
  2. Read and study Section 4.6 (pp 249 - 263) of Wakerly to learn about the ABEL language. See the Resources page for other ABEL-related documents that may be helpful to you.
     
  3. Install ispLEVER 1.0 Starter Kit . The full version of this software is installed in B-200, but your own installation will make it easy for you to work outside of lab.
     
  4. Read PLD Design Flow: GAL, ABEL to learn how to use Lattice Semiconductor's ispLEVER software to program a GAL from an ABEL source file.

    If you like a "multimedia" experience, try PLD Advisor. This package includes a "design flow designer" by which you can develop a diagram that shows the specific sequence of design steps for a given programmable logic device. Once you have created the design flow diagram, click each block in the diagram to launch a video clip that forms part of complete beginning-to-end design example. For this particular lab, follow the instructions for "GAL" and "ABEL".

    NOTE 1: The ispLEVER software has been updated several times in the years since I made PLD Advisor. Some of the specific details have changed, but much of the overall sense of how to things is the same. The PLD Design Flow: GAL, ABEL document above has been updated to the most current version of ispLEVER.

    NOTE 2: You need to a high-speed connection to the RHIT network in order to make good use of PLD Advisor (the video clips have not yet been converted to streaming format for low-bandwidth connections).
     
  5. Write an ABEL description for the Exponential Calculator that was specified in Lab 1. Implement all four output bits. Attach your final hardcopy to a lab book page.

    TIP: Some ABEL techniques are easier than others, but all get the job done in the end. Be sure to carefully read and study Section 4.6 in Wakerly, and pick the method that seems easiest to you.
     
  6. Develop ABEL test vectors to simulate and verify your design using ispLEVER. Attach hardcopy of your waveforms to a lab book page. Summarize how you know that the simulation results tell you that the your design works correctly.

    NOTE: Do not proceed to hardware implementation until your simulation is 100% correct!
     
  7. A photocopy of your prelab pages is due at the beginning of the class the day before lab.

Lab

Please use the Lab Help Queue to request assistance in lab.

  1. As a warm-up, implement a single inverter (a "half gate") in a GAL. Apply a squarewave source to the input, and confirm that you observe the inverted signal on the output.

    NOTE: Unused PLD inputs may be left floating. The programming software knows which input pins are unused, and engages an internal "pull-up" or "pull-down" device to keep the digital input at a known voltage level. Thus, it is not necessary for you to do this yourself.
     
  2. Demonstrate your "half gate" circuit to the instructor.
     
  3. Set up the 74HC4040 counter circuit to generate a four-bit input stimulus source. Use the Agilent 33120A function/arbitrary waveform generator to generate the squarewave clock signal needed by your counter circuit. Ensure that the squarewave switches between zero volts and five volts before you apply it to your circuit.
     
  4. Implement the Exponential Calculator in a GAL. Verify that your hardware meets specification for each of the sixteen possible inputs. Use the same MSO setup as last week.
     
  5. Demonstrate your finished circuit to the instructor.

All done!

bulletClean up your work area
bulletRemember to submit your lab notebook for grading at the beginning of next week's lab

 

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 ECE333: Digital Systems (W 2002-03)
Department of Electrical and Computer Engineering
Rose-Hulman Institute of Technology


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Last updated: 03/10/05.