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NOTE: This page still needs to be updated for S2005

XS-40 FPGA Board

	Concept to FPGA: Step-by-Step Instructions
	Simulating and Implementing Designs with Instantiated Cores
	XS-40 User's Manual
	XStend User's Manual
	About the programmable oscillator
	Location of Vdd and ground pins
	Location of global clock pins
	XSTOOLS software

Good Design Practice

Practices to Avoid

Verilog

	Gradual Introduction to Verilog: Combinational and Sequential
	On-Line HDL Quick Reference Guide
	FPGA System Design with Verilog: Workshop materials
	Silos 2001 demo software (Verilog behavioral simulator)
	Verilog Template Maker
	Chapter 11, "Verilog HDL", from textbook by Michael J. S. Smith.
	Understanding Verilog Blocking and Non-Blocking Assignments
	Verilog papers and links at Sutherland HDL, Inc.

Miscellaneous

Grid paper for drawing timing diagrams (portrait or landscape)

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ECE533: Programmable Logic Systems Design (S 2004-05)
Department of Electrical and Computer Engineering
Rose-Hulman Institute of Technology

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Last updated: 03/10/05.