Yes/No One-Line Multi-Line Multi Choice
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| Verilog Boilerplate Generator -- Accepts your module-specific
information and generates a template file for the module (saves a lot of
typing).
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| Verilog Template Maker
(beta test version) -- Improved version of the above. New features include facility for creating UCF file for XS-40 board,
automatic insertion of standard prefixes on identifier names, and error checker for module
and port identifier names.
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| Make a Comment -- Facilitates real-time commentary from everyone in
class. |
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