Multi-Module Design

In this section you are to implement a 16-bit up-down counter and display its value on the DIO1 4-digit display. The DIO1 switches and pushbuttons serve as the user input controls, and the DIO1 discrete LEDs display the status of each of the user inputs. Refer to the block diagram of the complete system for details.

The counter includes a "pause" input that causes the counter to hold its current value, and a "direction" input that indicates whether the counter increments or decrements. An unsigned three-bit input provides the increment (or decrement) amount. The counter also includes a count enable input (this input is generated by the frequency divider, so it is an internal signal rather than a user input.

The frequency divider accepts a 50-MHz clock and produces a lower-frequency pulse of one clock cycle duration according to the three-bit "rate" value. The frequency divider shall produce the output pulse at a frequency specified in the following table:

Note that the 25-MHz and 12.5-MHz options are included to simplify behavioral simulation (the other rate values would require millions of simulated clock cycles for each counter cycle).

Use the pre-written DigitDisplay module in digit_display.v.