High Speed Digital Filter Team

Team Members:  Cody Ray Wagner

Faculty Advisors:   Dr. Mario Simoni

High-speed analog-to-digital converters require high-speed digital filters.  Multiplierless filtering algorithms have been developed to be used for such high-speed applications.  A pipeline is then designed for VLSI implementation.  The implementation should contain a standard cell adder design that is easily expandable, and the system level compilation should be done using automatic place and route tools.

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