/* Do *not* directly modify this file. It was */ /* generated by the Configuration Tool; any */ /* changes risk being overwritten. */ /* INPUT c6711.cdb */ /* Include Header File */ #include "c6711cfg.h" #ifdef __cplusplus #pragma CODE_SECTION(".text:CSL_cfgInit") #else #pragma CODE_SECTION(CSL_cfgInit,".text:CSL_cfgInit") #endif #ifdef __cplusplus #pragma FUNC_EXT_CALLED() #else #pragma FUNC_EXT_CALLED(CSL_cfgInit) #endif #include "DSK_Support.h" /* Config Structures */ EDMA_Config edmaCfg_Tx0 = { 0x211E0002, /* Option */ (Uint32) buffer[0], /* Source Address - From User's Header File */ 0x00000800, /* Transfer Counter - Numeric */ (Uint32) DXR_address, /* Destination Address - From User's Header file */ 0x00000000, /* Index register - Numeric */ 0x080001B0 /* Element Count Reload and Link Address */ }; EDMA_Config edmaCfg_Tx1 = { 0x211E0002, /* Option */ (Uint32) buffer[1], /* Source Address - From User's Header File */ 0x00000800, /* Transfer Counter - Numeric */ (Uint32) DXR_address, /* Destination Address - From User's Header file */ 0x00000000, /* Index register - Numeric */ 0x080001B0 /* Element Count Reload and Link Address */ }; EDMA_Config edmaCfg_Tx2 = { 0x211E0002, /* Option */ (Uint32) buffer[2], /* Source Address - From User's Header File */ 0x00000800, /* Transfer Counter - Numeric */ (Uint32) DXR_address, /* Destination Address - From User's Header file */ 0x00000000, /* Index register - Numeric */ 0x080001B0 /* Element Count Reload and Link Address */ }; EDMA_Config edmaCfg_Rx0 = { 0x203F0002, /* Option */ (Uint32) DRR_address, /* Source Address - From User's Header File */ 0x00000800, /* Transfer Counter - Numeric */ (Uint32) buffer[0], /* Destination Address - From User's Header file */ 0x00000000, /* Index register - Numeric */ 0x080001B0 /* Element Count Reload and Link Address */ }; EDMA_Config edmaCfg_Rx1 = { 0x203F0002, /* Option */ (Uint32) DRR_address, /* Source Address - From User's Header File */ 0x00000800, /* Transfer Counter - Numeric */ (Uint32) buffer[1], /* Destination Address - From User's Header file */ 0x00000000, /* Index register - Numeric */ 0x080001B0 /* Element Count Reload and Link Address */ }; EDMA_Config edmaCfg_Rx2 = { 0x203F0002, /* Option */ (Uint32) DRR_address, /* Source Address - From User's Header File */ 0x00000800, /* Transfer Counter - Numeric */ (Uint32) buffer[2], /* Destination Address - From User's Header file */ 0x00000000, /* Index register - Numeric */ 0x080001B0 /* Element Count Reload and Link Address */ }; MCBSP_Config mcbspCfg_TI_daughtercard = { 0x00020000, /* Serial Port Control Reg. (SPCR) */ 0x000400A0, /* Receiver Control Reg. (RCR) */ 0x000400A0, /* Transmitter Control Reg. (XCR) */ 0x00000000, /* Sample-Rate Generator Reg. (SRGR) */ 0x00000000, /* Multichannel Control Reg. (MCR) */ 0x00000000, /* Receiver Channel Enable(RCER) */ 0x00000000, /* Transmitter Channel Enable(XCER) */ 0x00000000 /* Pin Control Reg. (PCR) */ }; MCBSP_Config mcbspCfg_eDSP_PCM3006 = { 0x00020000, /* Serial Port Control Reg. (SPCR) */ 0x000400A0, /* Receiver Control Reg. (RCR) */ 0x000400A0, /* Transmitter Control Reg. (XCR) */ 0x101F0F07, /* Sample-Rate Generator Reg. (SRGR) */ 0x00000000, /* Multichannel Control Reg. (MCR) */ 0x00000000, /* Receiver Channel Enable(RCER) */ 0x00000000, /* Transmitter Channel Enable(XCER) */ 0x00000A03 /* Pin Control Reg. (PCR) */ }; MCBSP_Config mcbspCfg_TLC320AD535 = { 0x00002000, /* Serial Port Control Reg. (SPCR) */ 0x00010040, /* Receiver Control Reg. (RCR) */ 0x00010040, /* Transmitter Control Reg. (XCR) */ 0x00000000, /* Sample-Rate Generator Reg. (SRGR) */ 0x00000000, /* Multichannel Control Reg. (MCR) */ 0x00000000, /* Receiver Channel Enable(RCER) */ 0x00000000, /* Transmitter Channel Enable(XCER) */ 0x00000000 /* Pin Control Reg. (PCR) */ }; MCBSP_Config mcbspCfg_AIC23_data = { 0x00000000, /* Serial Port Control Reg. (SPCR) */ 0x000400A0, /* Receiver Control Reg. (RCR) */ 0x000400A0, /* Transmitter Control Reg. (XCR) */ 0x00000000, /* Sample-Rate Generator Reg. (SRGR) */ 0x00000000, /* Multichannel Control Reg. (MCR) */ 0x00000000, /* Receiver Channel Enable(RCER) */ 0x00000000, /* Transmitter Channel Enable(XCER) */ 0x0000000F /* Pin Control Reg. (PCR) */ }; MCBSP_Config mcbspCfg_AIC23_control = { 0x00001000, /* Serial Port Control Reg. (SPCR) */ 0x00000000, /* Receiver Control Reg. (RCR) */ 0x00000040, /* Transmitter Control Reg. (XCR) */ 0x20100F04, /* Sample-Rate Generator Reg. (SRGR) */ 0x00000000, /* Multichannel Control Reg. (MCR) */ 0x00000000, /* Receiver Channel Enable(RCER) */ 0x00000000, /* Transmitter Channel Enable(XCER) */ 0x00000A0A /* Pin Control Reg. (PCR) */ }; /* Handles */ EDMA_Handle hEdmaCha12; EDMA_Handle hEdmaCha13; EDMA_Handle hEdmaCha14; EDMA_Handle hEdmaCha15; EDMA_Handle hEdmaTbl_Tx0; EDMA_Handle hEdmaTbl_Tx1; EDMA_Handle hEdmaTbl_Tx2; EDMA_Handle hEdmaTbl_Rx0; EDMA_Handle hEdmaTbl_Rx1; EDMA_Handle hEdmaTbl_Rx2; MCBSP_Handle hMcbsp0; MCBSP_Handle hMcbsp1; /* * ======== CSL_cfgInit() ======== */ void CSL_cfgInit() { hEdmaCha12 = EDMA_open(EDMA_CHA_XEVT0, EDMA_OPEN_RESET); hEdmaCha13 = EDMA_open(EDMA_CHA_REVT0, EDMA_OPEN_RESET); hEdmaCha14 = EDMA_open(EDMA_CHA_XEVT1, EDMA_OPEN_RESET); hEdmaCha15 = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET); hEdmaTbl_Tx0 = EDMA_allocTable(-1); hEdmaTbl_Tx1 = EDMA_allocTable(-1); hEdmaTbl_Tx2 = EDMA_allocTable(-1); hEdmaTbl_Rx0 = EDMA_allocTable(-1); hEdmaTbl_Rx1 = EDMA_allocTable(-1); hEdmaTbl_Rx2 = EDMA_allocTable(-1); hMcbsp0 = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET); hMcbsp1 = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET); edmaCfg_Tx0.rld = (edmaCfg_Tx0.rld & 0xFFFF0000) | (EDMA_RLD_RMK(0,hEdmaTbl_Tx1)); edmaCfg_Tx1.rld = (edmaCfg_Tx1.rld & 0xFFFF0000) | (EDMA_RLD_RMK(0,hEdmaTbl_Tx2)); edmaCfg_Tx2.rld = (edmaCfg_Tx2.rld & 0xFFFF0000) | (EDMA_RLD_RMK(0,hEdmaTbl_Tx0)); edmaCfg_Rx0.rld = (edmaCfg_Rx0.rld & 0xFFFF0000) | (EDMA_RLD_RMK(0,hEdmaTbl_Rx1)); edmaCfg_Rx1.rld = (edmaCfg_Rx1.rld & 0xFFFF0000) | (EDMA_RLD_RMK(0,hEdmaTbl_Rx2)); edmaCfg_Rx2.rld = (edmaCfg_Rx2.rld & 0xFFFF0000) | (EDMA_RLD_RMK(0,hEdmaTbl_Rx0)); EDMA_config(hEdmaTbl_Tx0, &edmaCfg_Tx0); EDMA_config(hEdmaTbl_Tx1, &edmaCfg_Tx1); EDMA_config(hEdmaTbl_Tx2, &edmaCfg_Tx2); EDMA_config(hEdmaTbl_Rx0, &edmaCfg_Rx0); EDMA_config(hEdmaTbl_Rx1, &edmaCfg_Rx1); EDMA_config(hEdmaTbl_Rx2, &edmaCfg_Rx2); }