//----- Synthesizable Circuit -----

module TopLevel (
// Demonstration system for Core Generator tutorial

	// Inputs:
	i$Clock,	// Master clock
	i$Invert,	// Invert the output
	i$Enable,	// Enable the 2\'s complementer
	i$DataIn,	// Data input

	// Outputs:
	o$InvertLED,	// Displays state of Invert input
	o$EnableLED,	// Displays state of Enable input
	o$LeftSevenSeg,	// Left seven-segment LED display
	o$RightSevenSeg,	// Right seven-segment LED display
	o$MicroReset,	// Hold microcontroller in reset mode
	o$RAMOE	// Disable RAM output enable
);

// Port mode declarations:
	// Inputs:
input	i$Clock;
input	i$Invert;
input	i$Enable;
input	[3:0]	i$DataIn;

	// Outputs:
output	o$InvertLED;
output	o$EnableLED;
output	[6:0]	o$LeftSevenSeg;
output	[6:0]	o$RightSevenSeg;
output	o$MicroReset;
output	o$RAMOE;


// Wire identifiers
wire	[3:0] w$TwosComp;
wire	[6:0] w$L7Seg,w$R7Seg;


// Functionality follows:
//

// Disable the microcontroller and RAM:
assign o$MicroReset = 1;
assign o$RAMOE = 1;

// Attach the single-segment LED outputs to the inputs (account
// for active-low LEDs)
assign o$InvertLED = ~i$Invert;
assign o$EnableLED = ~i$Enable;

// Invert the outputs of the 7-segment display drivers to account
// for active-low LEDs
assign o$LeftSevenSeg = ~w$L7Seg;
assign o$RightSevenSeg = ~w$R7Seg;

// Instantiate the 2's complementer
comp4 Comp (
	.a( i$DataIn ),
	.inv( i$Invert ),
	.c( i$Clock ),
	.ce( i$Enable ),
	.q( w$TwosComp )
);
 
// Instantiate 7-segment display drivers
SevenSeg LeftDisplay ( .i(i$DataIn), .o(w$L7Seg) );
SevenSeg RightDisplay ( .i(w$TwosComp), .o(w$R7Seg) );

// All done!
endmodule