JDF B
// Created by Version 8.1 
PROJECT display counter value on 7 segments
DESIGN display Normal
DEVKIT ispLSI5384VA-125LB388
ENTRY Schematic/Verilog HDL
STIMULUS topcounter.abv
MODULE bcd7seg.v
MODSTYLE bcd_to_seven_segment Normal
MODULE counter.v
MODSTYLE bcd_counter Normal
MODULE topcounter.v
MODSTYLE topcounter Normal