CSSE232 : Computer Architecture I

1: Tue Mar 11 1

  • Introduction & Course Overview
    • Read Ch 1 (esp. 1.1-1.3, 1.11)
    • Read A.2, A.3 (decoder/multiplexor) ; 2.4; 3.1-3.2
    • Practice A.11; 2.6
  • 1st Half: Intro to RISC-V assembly
  • 2nd Half: RISC-V R and I Types
    • Arithmetic operations
    • Logical operations
    • Read 2.6
    • Read 2.10 (Important reading)
    • Practice 2.17-18,20
  • Homeworks
    • HW1 review (due Fri Mar 14)
    • HW2 compiling c into assembly (due Fri Mar 14)

2: Wed Mar 12 1

  • No class, hw due date

3: Thu Mar 13 1

  • 1st Half: RISC-V immediates, lw and sw
    • Review 2.10
  • 2nd Half: Practical
  • Homeworks:
    • HW3 assembling instructions (due Wed Mar 19)

4: Fri Mar 14 1

  • No class, hw due date
  • Due: * HW1
  • Due: * HW2


5: Tue Mar 18 2

  • 1st Half: RISC-V Branches and Jumps
    • Read 2.7
    • Practice 2.21-22; 2.24; 2.27-28
  • 2nd Half: Pseudoinstructions
    • Read 2.12 "Assembler" section
  • Homeworks:
    • HW4 loops (due Fri Mar 21)
    • HW5 pseudoinstructions (due Fri Mar 21)

6: Wed Mar 19 2

  • No class, hw due date
  • Due: * HW3

7: Thu Mar 20 2


8: Fri Mar 21 2

  • No class, hw due date
  • Due: * HW4
  • Due: * HW5


9: Tue Mar 25 3

  • 1st Half: Addressing modes
  • 2nd Half: Procedures
    • Read 2.8; (this is an important reading)
    • Practice 2.29-31; 2.33
  • Homeworks:
    • HW6 addressing modes (due Fri Mar 28)
    • HW7 procedure calling (due Fri Mar 28)

10: Wed Mar 26 3

  • No class, hw due date

11: Thu Mar 27 3

  • 1st Half: More procedures
    • Read 2.13
  • 2nd Half: Practical
  • Homeworks:
    • HW8 procedures and loops (due Wed Apr 02)
  • Due: * Practical2.pdf

12: Fri Mar 28 3

  • No class, hw due date
  • Due: * HW6
  • Due: * HW7


13: Tue Apr 01 4

  • 1st Half: Verilog
    • Verilog survival guide 1: Video
    • Verilog survival guide 2: Video
  • 2nd Half: Building Single-Cycle datapath (R-types)
    • Read 4.1-3
    • Practice 4.1-4
  • Homeworks:
    • HW9 write verilog code (due Fri Apr 04)
    • HW10 write relprime (due Fri Apr 04)

14: Wed Apr 02 4

  • No class, hw due date
  • Due: * HW8

15: Thu Apr 03 4


16: Fri Apr 04 4

  • No class, hw due date
  • Due: * HW9
  • Due: * HW10


17: Tue Apr 08 5

  • 1st Half: More Single-Cycle datapath (I-types)
  • 2nd Half: Even more datapath (Branch and Jumps)
  • Homeworks:
    • HW12 single cycle control (due Fri Apr 11)

18: Wed Apr 09 5

  • No class, hw due date

19: Thu Apr 10 5

  • 1st Half: Single-Cycle Control
    • Read 4.4
    • Practice 4.4-5
  • 2nd Half: Practical
  • Homeworks:
    • HW11 adding new single cycle instruction (due Wed Apr 23)
  • Due: * Practical4.pdf

20: Fri Apr 11 5

  • No class, hw due date
  • Due: * HW12


Break



21: Tue Apr 22 6

  • 1st Half: Input/Output
    • Read 2.9
    • Practice 2.38
  • 2nd Half: Performance
  • Homeworks:
    • HW14 performance (due Fri Apr 25)

22: Wed Apr 23 6

  • No class, hw due date
  • Due: * HW11

23: Thu Apr 24 6


24: Fri Apr 25 6

  • No class, hw due date
  • Due: * HW14


25: Tue Apr 29 7


26: Wed Apr 30 7


27: Thu May 01 7


28: Fri May 02 7



29: Tue May 06 8


30: Wed May 07 8


31: Thu May 08 8


32: Fri May 09 8



33: Tue May 13 9


34: Wed May 14 9


35: Thu May 15 9


36: Fri May 16 9



37: Tue May 20 10


38: Wed May 21 10


39: Thu May 22 10


40: Fri May 23 10