CSSE232 : Computer Architecture I
1: Tue Mar 11 1
- Introduction & Course Overview
- Read Ch 1 (esp. 1.1-1.3, 1.11)
- Read A.2, A.3 (decoder/multiplexor) ; 2.4; 3.1-3.2
- Practice A.11; 2.6
- 1st Half: Intro to RISC-V assembly
- RISC-V green sheet
- Read 2.1-2.3
- Practice 2.1-2.4; 2.7-2.8
- 2nd Half: RISC-V R and I Types
- Arithmetic operations
- Logical operations
- Read 2.6
- Read 2.10 (Important reading)
- Practice 2.17-18,20
- Homeworks
2: Wed Mar 12 1
- No class, hw due date
3: Thu Mar 13 1
- 1st Half: RISC-V immediates, lw and sw
- Review 2.10
- 2nd Half: Practical
- Practical1.pdf Assembler I (due Thu Mar 20)
- Homeworks:
- HW3 assembling instructions (due Wed Mar 19)
4: Fri Mar 14 1
5: Tue Mar 18 2
- 1st Half: RISC-V Branches and Jumps
- Read 2.7
- Practice 2.21-22; 2.24; 2.27-28
- 2nd Half: Pseudoinstructions
- Read 2.12 "Assembler" section
- Homeworks:
6: Wed Mar 19 2
- No class, hw due date
- Due: * HW3
7: Thu Mar 20 2
- CONVOCATION DAY: check schedule times
- 1st Half: Quiz 1
- See Sample Quiz 1 and (Sample Quiz 1 Solution)
- 2nd Half: Practical
- Practical2.pdf Assembler II (due Thu Mar 27)
- Homeworks:
- None
- Due: * Practical1.pdf
8: Fri Mar 21 2
9: Tue Mar 25 3
- 1st Half: Addressing modes
- Read 2.10 (Important reading)
- Practice 2.12; 2.22
- Immediate Translation Handout
- 2nd Half: Procedures
- Read 2.8; (this is an important reading)
- Practice 2.29-31; 2.33
- Homeworks:
10: Wed Mar 26 3
- No class, hw due date
11: Thu Mar 27 3
- 1st Half: More procedures
- Read 2.13
- 2nd Half: Practical
- Practical3.pdf RISC-V Programming (due Thu Apr 03)
- Homeworks:
- HW8 procedures and loops (due Wed Apr 02)
- Due: * Practical2.pdf
12: Fri Mar 28 3
13: Tue Apr 01 4
- 1st Half: Verilog
- 2nd Half: Building Single-Cycle datapath (R-types)
- Read 4.1-3
- Practice 4.1-4
- Homeworks:
14: Wed Apr 02 4
- No class, hw due date
- Due: * HW8
15: Thu Apr 03 4
- 1st Half: Quiz 2
- See Sample Quiz 2 and (Sample Quiz 2 Solution)
- 2nd Half:
- Practical4 Building and Testing Hardware (due Thu Apr 10)
- Homeworks:
- None
- Due: * Practical3.pdf
16: Fri Apr 04 4
17: Tue Apr 08 5
- 1st Half: More Single-Cycle datapath (I-types)
- Read Single-cycle RTL
- 2nd Half: Even more datapath (Branch and Jumps)
- Homeworks:
- CATME singlecycle team forming survey (due Fri Apr 11)
- HW11 add single cycle instruction (due Fri Apr 11)
18: Wed Apr 09 5
- No class, hw due date
19: Thu Apr 10 5
- 1st Half: Single-Cycle Control
- Read 4.4
- Practice 4.4-5
- 2nd Half: Practical
- Practical5 Single-Cycle Processor I (due Thu Apr 24)
- Homeworks:
- HW12 single cycle control (due Wed Apr 23)
- Due: * Practical4
20: Fri Apr 11 5
- No class, hw due date
- Due: * CATME singlecycle team forming survey
- Due: * HW11
Break
21: Tue Apr 22 6
- 1st Half: Input/Output
- Read 2.9
- Practice 2.38
- 2nd Half: Performance
- Read 1.4-1.9
- Practice Examples; 1.5–7; 2.39-40
- Homeworks:
- HW14 performance (due Fri Apr 25)
22: Wed Apr 23 6
- No class, hw due date
- Due: * HW12
23: Thu Apr 24 6
- 1st Half: Quiz 3
- Study HW11
- See Example Quiz 3 (Example Quiz 3 solution)
- 2nd Half: Practical:
- Practical6 Single-Cycle Processor II (due Thu May 01)
- Homeworks:
- CATME single cycle team eval (due Thu May 01)
- Due: * Practical5
24: Fri Apr 25 6
- No class, hw due date
- Due: * HW14
25: Tue Apr 29 7
- 1st Half: Pipelined datapath and control
- Read 4.6-4.7
- Practice 4.19-20
- 2nd Half: More Pipelined datapath and control
- Homeworks
- CATME pipeline team forming survey (due Fri May 02)
26: Wed Apr 30 7
- No class, hw due date
27: Thu May 01 7
- 1st Half: Data and control hazards
- Read 4.8-4.9
- Practice 4.22; 4.26
- 2nd Half: Practical
- Practical7 Pipelined Processor I (due Thu May 08)
- Homeworks:
- None
- Due: * Practical6
- Due: * CATME single cycle team eval
28: Fri May 02 7
- No class, hw due date
- Due: * CATME pipeline team forming survey
29: Tue May 06 8
-
1st Half: More Pipeline Hazards
- Read 4.8-4.9
-
2nd Half: Adding Pipelined Instructions
-
Homeworks:
30: Wed May 07 8
- No class, hw due date
31: Thu May 08 8
- 1st Half: Quiz 4
- Study HW11 and HW12
- See Example Quiz 4 (Example Quiz 4 solution)
- 2nd Half: Practical
- Practical8 Pipelined Processor II (due Thu May 15)
- Homeworks:
- None
- Due: * Practical7
32: Fri May 09 8
33: Tue May 13 9
- 1st Half: Faster Branching with a Pipelined Processor
- 2nd Half: Adding more pipelined instructions
34: Wed May 14 9
- No class, hw due date
35: Thu May 15 9
- 1st Half: Pipelined Performance
- 2nd Half: Practical
- Practical9 Pipelined Processor III (due Thu May 22)
- Homeworks:
- None
- Due: * Practical8
36: Fri May 16 9
- No class, hw due date
37: Tue May 20 10
- 1st Half: Other Architectures II
- 2nd Half: Practical
- Practical 10: Pipeline Design Presentation (The presentation happens during Finals Week.)
- Homeworks:
- CATME pipeline team eval (due Tue May 27)
38: Wed May 21 10
- No class, hw due date
39: Thu May 22 10
- 1st Half: Quiz 5
- Study HW15 and HW16
- See Example Quiz 5 (Example Quiz 5 solution)
- 2nd Half: Wrap up (attendance required)
- Homeworks:
- None
- Due: * Practical9
40: Fri May 23 10
- No class, hw due date