Milestone 4
1. Control Unit Design
The next step in the design process is to specify the control of your processor. The details of this step will depend on the design and complexity of your datapath. You may need several control units of different types to control your datapath easily.
For any simple combinational control units, you should provide a truth table relating the inputs to the outputs. For any FSMs, you should provide a state transition diagram or table.
However you choose to implement the control units, you should also specify how you plan to test their correct implementations. The control unit may be designed using Verilog.
Tip (seriously, read this): Add a reset control to initialize your processor to the appropriate values. (For multicycle, this will be a state node in the state diagram)
You should have all your parts implemented and tested according to your design document. You should also begin executing your integration plan. Good testing is key and will save you countless hours later!
You may modify your register transfer language specification during the control design phase, but not your assembly language or machine language specifications (unless you obtain instructor approval).
Remember to consider how your project will be evaluated. Maintaining good documentation is an important consideration, but creativity at this stage can still influence performance, area, and especially interestingness.
2. Turning in M4
For this milestone, submit the following:
- An updated design document that includes the following
-
The specifications of the control units, as described above.
-
Descriptions of the tests necessary to verify the correct implementation of your control units.
-
An updated list of the control signals.
-
Changes made to the RTL descriptions.
-
Changes to the integration plan.
- Partial implementation:
- Electronic version of your current models for all components (except the control unit) must be available in your team's Implementation directory.
- All the test-benches necessary to implement your unit test plans.
- Partially executed integration plan: you should have at least some of your parts integrated.
- Most of the tests for your integration plan.
-
An updated design process journal.
-
An updated individual itemized log of each member's work for the week and an estimated work time for each item. Each member is responsible for their own log.
-
Your team should demo the Memory lab around the time this milestone is due. (But not during milestone meetings.)
Your (updated) design document and (updated) design process journals should be placed in the
Design directory of your team's repository.
Your implementation files should be placed in the Implementation
directory of your team's repository.
The names of your design document and design process journal should not change.